A novel MBE-grown method using low-temperature (L T) Si technology is introduced into the fabrication of strained Si channel heter ojunction pMOSFETs.By sandwiching a low-temperature Si layer between Si buffer and SiGe layer,the strain relaxation degree of the SiGe layer is increased.At th e same time,the threading dislocations (TDs) are hold back from propagating to t he surface.As a result,the thickness of relaxed Si 1-xGe x epitax y layer on bulk silicon is reduced from several micrometers using UHVCVD to less than 400nm(x=0.2),which will improve the heat dissipation of devices.AFM t ests of strained Si surface show RMS is less than 1.02nm.The DC characters meas ured by HP 4155B indicate that hole mobility μ p has 25% of maximum enhanc ement compared to that of bulk Si pMOSFET processed similarly.
