By epitaxial layer structure design and key fabrication process optimization,a lattice-matched InP-based In0.53Ga0.47 As-In0.52Al0.48As HEMT with an ultra high maximum oscillation frequency （fmax） of 183GHz was fab- ricated. The fmax is the highest value for HEMTs in China. Also, the devices are reported, including the device structure, the fabrication process, and the DC and RF performances.
Lattice-matched In0.5 Ga0.47 As/In0.52 Al 0.48 As high electron mobility transistors （HEMTs） with a cutoff frequency （ft） as high as 218GHz are reported. This fT is the highest value ever reported for HEMTs in China. These devices also demonstrate excellent DC characteristics：the extrinsic transconductance is 980mS/mm and the maximum current density is 870mA/mm. The material structure and all the device fabrication technology in this work were developed by our group.
GaAs-based metamorphic HEMTs (MHEMT) consist of GaAs substrates and InP-based epitaxial structure, and have the advantages of both InP HEMT's excellent performances and GaAs-based HEMT's mature processes. GaAs-based MHEMTs were applied to millimeter-wave low-noise, high-power applications and systems. The current gain cut-off frequency (fT) and the maximum oscillation frequency (fmax) are important performance parameter of GaAs-based MHEMTs, and they are limited by the gate-length mainly. Electron beam lithography is one of the lithography technologies which can be used to realize the deep submicron gate-length. The 200 nm gate-length GaAs-based MHEMTs have been fabricated by electron beam lithography. In order to reduce the parasite gate capacitance and gate resistance, a trilayer resist structure was used to pattern the T-gate resist profile. Excellent DC, high frequency and power performances have been obtained. FT and fmax are 105 GHz, 70 GHz respectively. The research is very helpful to obtain higher performance GaAs-based MHEMTs.
200nm gate-length GaAs-based InAlAs/InGaAs MHEMTs are fabricated by MBE epitaxial material and EBL （electron beam lithography） technology. Ti/Pt/Au is evaporated to form gate metals. A T-shaped gate is produced using a novel PMMA/PMGI/PMMA trilayer resist structure to decrease parasitic capacitance and parasitic resistance of the gate. Excellent DC and RF performances are obtained and the transconductance （gm） ,maximum saturation drain current density （Joss）, threshold voltage （ VT）, current cut-off frequency （fT） , and maximum oscillation frequency （fmax） of InAlAs/ InGaAs MHEMTs are 510mS/mm,605mA/mm, -1.8V, 110GHz, and 72GHz, respectively.
A two-stage monolithic low noise amplifier is developed for satellite communication applications,using a 0.5μm enhancement PHEMT technology. The on-chip matched amplifier employs lumped elements to reduce the circuit size, and shows a 5012 noise figure less than 0.9dB, gain greater than 26dB, and return loss less than - 10dB in the S-C band range of 3.5 to 4. 3GHz. The noise figure obtained here is the best result ever reported to date of an MMIC LNA with a gain of more than 20dB for the S-C band frequency range. It is attributed to the low noise performance of the enhancement PHEMT transistor and minimized parasitic resistance of the input match network by a common series source inductor and a unique divided resistance at the drain.
A monolithic voltage controlled oscillator （VCO） based on negative resistance principle is presented uti-lizing commercially available InGaP/GaAs hetero-junction bipolar transistor （HBT） technology. This VCO is de-signed for 5GHz-band wireless applications. Except for bypass and decoupled capacitors,no external component is needed for real application. Its measured output frequency range is from 4.17 to 4.56GHz,which is very close to the simulation one. And the phase noise at an offset frequency of 1MHz is -112dBc/Hz. The VCO core dissipates 15.5mW from a 3.3V supply,and the output power ranges from 0 to 2dBm. To compare with other oscillators,the figure of merit is calculated,which is about -173.2dBc/Hz. Meanwhile, the principle and design method of nega-tive resistance oscillator are also discussed.
A programmable multi-modulus frequency divider is designed and implemented in a 0. 35μm CMOS process. The multi-modulus frequency divider is a single chip with two dividers in series,which are divided by 4 or 5 prescaler and by 128-255 multi-modulus frequency divider. In the circuit design, power and speed trade-offs are analyzed for the prescaler, and power optimization techniques are used according to the input frequency of each divider cell for the 128-255 multimodulus frequency divider. The chip is designed with ESD protected I/O PAD. The dividers chain can work as high as 2.4GHz with a single ended input signal and beyond 2.6GHz with differential input signals. The dual-modulus prescaler consumes 11mA of current while the 128-255 multi-modulus frequency divider consumes 17mA of current with a 3.3V power supply. The core area of the die without PAD is 0.65mm × 0.3mm. This programmable multi-modulus frequency divider can be used for 2.4GHz ISM band PLL-based frequency synthesizers. To our knowledge, this is the first reported multi-modulus frequency divider with this structure in China.
